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NCP5007
Basically, the chip operates with two cycles:
Cycle #1 : time t1, the energy is stored into the inductor
Cycle #2 : time t2, the energy is dumped to the load
The POR signal sets the flip?flop and the first cycle takes
place. When the current hits the peak value, defined by the
error amplifier associated with the loop regulation, the
First Startup
I L
flip?flop resets, the NMOS is deactivated and the current is
dumped into the load. Since the timing is application
dependent, the internal timer limits the Toff cycle to 320 ns
(typical), making sure the system operates in a continuous
mode to maximize the energy transfer.
Normal Operation
Ipeak
Iv
0 mA
t1
t2
t
Ids
0 mA
Io
0 mA
Figure 4. Basic DC?DC Operation
t
t
Based on the data sheet, the current flowing into the
inductor is bounded by two limits:
? Ipeak Value: Internally fixed to 350 mA typical
? Iv Value: Limited by the fixed Toff time built in the
chip (320 ns typical)
The system operates in a continuous mode as depicted in
Figure 4 and t 1 & t 2 times can be derived from basic
equations. (Note: The equations are for theoretical analysis
only, they do not include the losses.)
Of course, from a practical stand point, the inductor must
be sized to cope with the peak current present in the circuit
to avoid saturation of the core. On top of that, the ferrite
material shall be capable to operate at high frequency
(1.0 MHz) to minimize the Foucault’s losses developed
during the cycles.
The operating frequency can be derived from the
electrical parameters. Let V = Vo ? V bat , rearranging
Equation 1:
E + L * di
ton + dI * L
dt
(eq. 1)
E
(eq. 5)
Let E = V bat , then:
t1 +
(Ip * Iv) * L
Vbat
(eq. 2)
Since toff is nearly constant (according to the 320 ns
typical time), the dI is constant for a given load and
inductance value. Rearranging Equation 5 yields:
t2 +
(Ip * Iv) * L
Vo * Vbat
*L
ton +
(eq. 6)
(eq. 3)
Since t 2 = 320 ns typical and Vo = 22 V maximum, then
V*dt
L
E
Let E = V bat , and Vopk = output peak voltage, then:
D I +
ton +
(assuming a typical V bat = 3.0 V):
t2 * (Vo * Vbat)
L
(Vopk * Vbat) * dt
Vbat
Finally, the operating frequency is:
(eq. 7)
F +
1
ton ) toff
D Imax +
320e * 9 * (22 * 3.0)
22e * 6
+ 276 mA
(eq. 4)
(eq. 8)
The output power supplied by the NCP5007 is limited to
one watt: Figure 5 shows the maximum power that can be
delivered by the chip as a function of the input voltage.
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